CPU & PCI Bus Control
PCI Master 0 WS Write
When enabled, allows a zero-wait-state-cycle delay when the PCI master
drive writes data to DRAM. The options are: Enabled, Disabled.
VLink 8X Support
Enables VLink 8X support. The options are: Enabled, Disabled.
PCI Delay Transaction
Enable it to abort the current PCI master cycle and accept a new PCI master
request, it reaccepts the original PCI master, returns PCI data phase to the
original PCI master. The options are: Disabled, Enabled.
System BIOS Cacheable
When enabled, allows the ROM area F000H-FFFFH to be cacheable when
cache controller is activated. The options are: Enabled, Disabled.
Integrated Peripherals
BIOS Setup
3 - 11