Holtek BS83A04C Manual page 38

Entering the SLEEP Mode
There is only one way for the device to enter the SLEEP Mode and that is to execute the "HALT"
instruction in the application program with both the FHIDEN and FSIDEN bits in the SCC register
equal to "0". In this mode all the clocks and functions will be switched off except the WDT function.
When this instruction is executed under the conditions described above, the following will occur:
• The system clock will be stopped and the application program will stop at the "HALT" instruction.
• The Data Memory contents and registers will maintain their present condition.
• The I/O ports will maintain their present conditions.
• In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO,
will be cleared.
• The WDT will be cleared and resume counting as the WDT function is always enabled.
Entering the IDLE0 Mode
There is only one way for the device to enter the IDLE0 Mode and that is to execute the "HALT"
instruction in the application program with the FHIDEN bit in the SCC register equal to "0" and the
FSIDEN bit in the SCC register equal to "1". When this instruction is executed under the conditions
described above, the following will occur:
• The f clock will be stopped and the application program will stop at the "HALT" instruction, but
H
the f clock will be on.
SUB
• The Data Memory contents and registers will maintain their present condition.
• The I/O ports will maintain their present conditions.
• In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO,
will be cleared.
• The WDT will be cleared and resume counting as the WDT function is always enabled.
Entering the IDLE1 Mode
There is only one way for the device to enter the IDLE1 Mode and that is to execute the "HALT"
instruction in the application program with both the FHIDEN and FSIDEN bits in the SCC register equal
to "1". When this instruction is executed under the conditions described above, the following will occur:
• The f and f
H SUB
• The Data Memory contents and registers will maintain their present condition.
• The I/O ports will maintain their present conditions.
• In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO,
will be cleared.
• The WDT will be cleared and resume counting as the WDT function is always enabled.
Entering the IDLE2 Mode
There is only one way for the device to enter the IDLE2 Mode and that is to execute the "HALT"
instruction in the application program with the FHIDEN bit in the SCC register equal to "1" and the
FSIDEN bit in the SCC register equal to "0". When this instruction is executed under the conditions
described above, the following will occur:
• The f clock will be on but the f
H
"HALT" instruction.
• The Data Memory contents and registers will maintain their present condition.
• The I/O ports will maintain their present conditions.
• In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO,
will be cleared.
• The WDT will be cleared and resume counting as the WDT function is always enabled.
Rev. 1.00
4-Key Enhanced Touch I/O Flash MCU
clocks will be on but the application program will stop at the "HALT" instruction.
clock will be off and the application program will stop at the
SUB
38
BS83A04C
March 24, 2020