Programming Considerations
Care must be taken that data is not inadvertently written to the Emulated EEPROM. Protection can
be enhanced by ensuring that the Write Enable bit is normally cleared to zero when not writing.
Although certainly not necessary, consideration might be given in the application program to the
checking of the validity of new write data by a simple read back process. When writing or erasing
data the EWR or EER bit must be set high immediately after the EWREN or EEREN bit has been
set high, to ensure the write or erase cycle executes correctly. The global interrupt bit EMI should
also be cleared to zero before a write or erase cycle is executed and then set again after a valid write
or erase activation procedure has completed. Note that the device should not enter the IDLE or
SLEEP mode until Emulated EEPROM read, write or erase operation is totally complete. Otherwise,
Emulated EEPROM read, write or erase operation will fail.
Programming Examples
Erase a Data Page of the Emulated EEPROM – polling method
MOV A, EEPROM_ADRES ; user defined page
MOV EAR, A
MOV A, 00H
MOV ECR, A
CLR EMI
SET EEREN
SET EER
SET EMI
BACK:
SZ EER
JMP BACK
:
Writing Data to the Emulated EEPROM – polling method
MOV A, EEPROM_ADRES ; user defined address
MOV EAR, A
MOV A, EEPROM_DATA0_L ; user defined data
MOV ED0L, A
MOV A, EEPROM_DATA0_H
MOV ED0H, A
MOV A, EEPROM_DATA1_L
MOV ED1L, A
MOV A, EEPROM_DATA1_H
MOV ED1H, A
MOV A, EEPROM_DATA2_L
MOV ED2L, A
MOV A, EEPROM_DATA2_H
MOV ED2H, A
MOV A, EEPROM_DATA3_L
MOV ED3L, A
MOV A, EEPROM_DATA3_H
MOV ED3H, A
MOV A, 00H
MOV ECR, A
CLR EMI
SET EWREN
SET EWR
SET EMI
BACK:
SZ EWR
JMP BACK
:
Rev. 1.00
4-Key Enhanced Touch I/O Flash MCU
; Erase time=2ms (40H for 4ms, 80H for 8ms, C0H for 16ms)
; set EEREN bit, enable erase operation
; start Erase Cycle – set EER bit – executed immediately after
; setting EEREN bit
; check for erase cycle end
; Write time=2ms (40H for 4ms, 80H for 8ms, C0H for 16ms)
; set EWREN bit, enable write operation
; start Write Cycle – set EWR bit – executed immediately after
; setting EWREN bit
; check for write cycle end
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BS83A04C
March 24, 2020
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