Analog Devices ADSP-BF609 EZ-KIT Lite Manual page 97

I INDEX
A
ADSP-BF609 Blackfin processor,
ADSP-BF609 processor memory map,
architecture, of this EZ-KIT Lite,
B
bill of materials, A-1
board schematic (ADSP-BF609),
boot
modes, 2-20
mode select switch (SW2),
bus switch, 2-5
example, 2-6
C
CAN connector (J4), 2-28
CAN interface, 1-15
configuration, of this EZ-KIT Lite,
connectors, 2-25
diagram of locations, 2-25
J1 (ethernet), 2-28
J2 (DCE UART), 2-26
J3 and P8 (Link Port / JTAG),
J4 (CAN), 2-28
J5 (SD), 2-28
P16-17 (ethernet), 2-28
P18 (power), 2-27
P1A-C (expansion), 2-27
ADSP-BF609 EZ-KIT Lite Evaluation System Manual
connectors
P1 (JTAG),
x
P2A (expansion),
1-11
P3A (expansion),
2-2
P7 (USB),
ZP1 (JTAG),
contents, of this EZ-KIT Lite package,
B-1
D
DCE UART connector (J2),
DDR2 SDRAM controller,
2-20
default configuration, of this EZ-KIT Lite,
default jumper and switch settings,
default processor interface availability,
design reference info,
E
EngineerZone,
1-3
ethernet
connector (J1),
connectors (P16-17),
ethernet interface,
example programs,
2-26
expansion interface, 1-20,
F
FET switches,
example,
(continued)
2-26
2-27
2-27
2-27
2-27
2-26
1-12
1-4
1-22
xvii
2-28
2-28
1-13
1-22
2-27
2-4
2-4
1-2
1-3
2-7
I-1