Analog Devices ADSP-BF609 EZ-KIT Lite Manual page 53

Evaluation system
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, a 10-bit bus switch, controls the link port 1 connection to
U40
port connector), EI3 (expansion interface), and
default setting is high, which connects the SMC address bus to the parallel
flash memory and connects the link port pins
expansion interface. The link port 1 can be selected by setting
low.
GPA1
Table 2-5
and
Table 2-6
expander (
), with a TWI address of 0100 001X, where X represents the
U45
read or write bit. The signals that control an individual FET have an entry
under the FET column. The Component Connected column shows the
board IC that is connected if the FET is enabled. Note that some of the
Microchip (
) output signals are connected directly to components on
U45
the board. However, in most cases, the Microchip (
enable signal of a FET switch. Also note that if a particular functionality
of the processor signal is being used, it will be in bold font under the
Processor Signal column.
Table 2-5. Output Signals of Microchip GPIO Expander
(U45 Port A)
Bit Signal Name
0
CAN_EN
1
CAN_STB
2
CAN0_ERR_EN
3
CAN0RX_EN
4
CNT0UD_EN
ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
show the output signals of the Microchip GPIO
Description
Enable CAN IC, enabled by
default
CAN standby control input
GPIO PE02 for CAN0 error
CAN0RX connected to
CAN IC U55
Rotary counter 0 count up
connected to rotary connec-
tor
address signals. The
SMC
and
PA8-15
PB2-3
) is controlling the
U45
FET Processor Signal
(if applicable)
U33 PE02/SPI1_
RDY/PPI0_
D22/SPT1_ACLK
U34 PG04/SPT2_
ACLK/TM0_
TMR1/CAN0_
RX/TM0_ACI2
U30 PG11/SPT2_
BD1/TM0_
TMR6/CNT0_UD
(link
P8
to the
signal
U46
Component
Default
Connected
High
U55
High
U55
High
U55
Low
U55
Low
SW9
2-11

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