2: Point Device Type Input Registers - Honeywell CGW-MB Installation And User Manual

Register Mapping
Table 7.15: Point Status Holding Register Channel Addresses (Continued)
NOTE: On the AFP-2800, output activation status is not reported to the CGW-MB and
therefore the bits and event type will always indicate a non-active state.
7.21.2 Point Device Type Input Registers
NOTE: If the point is not present in the panel programming, all bits in the byte will contain
a value of 1 or FFFFH.
There are 6000 point device type holding registers. Each register address consists of two
bytes representing a detector or module.
Bit
15
No.
CGW-MB Installation and Users' Manual | P/N:LS10248-000HW-E | REV.G | JUL/31/2022
400301 400600
400601 400900
400901 401200
401201 401500
401501 401800
401801 402100
402101 402400
402401 402700
402701 403000
403001 403300
403301 403600
403601 403900
403901 404200
404201 404500
404501 404800
404801 405100
405101 405400
405401 405700
405701 406000
Table 7.16: Point Device Type Input Register Bit Definitions
Upper Byte
14 13 12 11
Device Types (see
Table 7.17: Input Register Addresses of the Point Device Types
Start
Address Address
300001 300300
300301 300600
300601 300900
300901 301200
301201 301500
301501 301800
L1M1–L1M300
L2D1–L2D300
L2M1–L2M300
L3D1–L3D300
L3M1–L3M300
L4D1–L4D300
L4M1–L4M300
L5D1–L5D300
L5M1–L5M300
L6D1–L6D300
L6M1–L6M300
L7D1–L7D300
L7M1–L7M300
L8D1–L8D300
L8M1–L8M300
L9D1–L9D300
L9M1–L9M300
L10D1–L10D300
L10M1–L10M300
10 9 8 7 6
7.30 "Device Types"
End
Address
L1D1–L1D300
L1M1–L1M300
L2D1–L2D300
L2M1–L2M300
L3D1–L3D300
L3M1–L3M300
Modbus Communications
Lower Byte
5 4 3 2 1
)
0
60