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1
Introduction
18
•
Sample Clk Out - The Sample Clock Output provides the clock selected
for use in the M8121A.
•
Ref Clk In - The Reference Clock Input can be used to synchronize to an
external clock.
•
Ref Clk Out - The Reference Clock Output can be used to synchronize a
DUT to the M8121A.
•
Vector Mrk Out - This port has a similar functionality as the sample
Marker Output. It has timing resolution of 64 sample clock periods for
direct 14- and 12-bit modes, and 32 I/Q sample pairs for DUC modes.
•
Vector Clk Out - The Vector Clock Output can be used to synchronize
with external customer DUT.
•
Trigger In - This port is reserved for future use.
•
Aux In - This port is reserved for future use.
•
Sync In - This port is reserved for future use.
•
LPN Clk In - This port is used when the "Low Phase Noise External"
is selected as the Sample Clock source. Low phase noise (LPN) is used
with an externally connected high quality clock. Clock to data delay
control is not available when using LPN Clk In. LPN is available if
Option -LPN is installed. Option -LPN is software upgradeable.
•
FPGA Config - This port is reserved for future use.
LEDs
The M8121A front panel includes the following LEDs:
• Status LEDs
The "Fail" and "Access" LEDs are available at the front panel to indicate
the status of the M8121A module:
•
The green 'Access' LED indicates that the controlling PC exchanges
data with the M8121A module. This LED blinks after power on, and
remains solid after the module's PCIe endpoint has enumerated on
the bus and is ready for communication.
•
The red 'Fail' LED is 'ON' for about 2 seconds after powering the
AXIe chassis. After about 2 seconds the red LED is switched 'OFF'.
During normal operation of the module this LED is 'OFF'. In case of
an error condition such as e.g. a self-test error, the LED is switch
'ON'.
Keysight M8121A Arbitrary Waveform Generator User Guide
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