Panasonic MN34120PAJ Manual page 10

Confidential
Until : Indefinite
Table 1.1.3 List of Pin Descriptions, Process and Functions No.2
Management
PIN No. Pin name
No
40 F3 GND
41 F9 AVDDP
42 F10 AVDDP
43 F11 AVDDR
44 G1 SDOD7M LVDS output (port12 data -)
45 G2 SDOD7P LVDS output (port12 data +)
46 G3 SDOD8P LVDS output (2ch mode: ch2 clock +)
47 G9 AVDDSD
48 G10 AVDDPL
49 G11 VCHP1
50 H1 SDOD9M LVDS output (port11 data -)
51 H2 SDOD9P LVDS output (port11 data +)
52 H3 SDOD8M LVDS output (2ch mode: ch2 clock -)
53 H4 GND
54 H5 GND
55 H6 NC
56 H7 NC
57 H8 NC
58 H9 VDD33
59 H10 VDD33
60 H11 VCHP2
61 J3 SDODAP LVDS output (port10 data +)
62 J4 GNDL
63 J5 VDD18L
64 J6 VDD
65 J7 VDD
66 J8 GND
67 J9 BIASO
68 K3 SDODAM LVDS output (port10 data -)
69 K4 GNDL
70 K5 VDD18L
71 K6 VDD
72 K7 VDD
73 K8 GND
74 K9 VCHP3
・About power supply /GND that becomes a pair
Please arrange the decoupling capacitor (0.01μF) in the terminal neighborhood as much as possible.
・The decoupling capacitor for power supply that has been described is a reference value.
Since the capacitor is different according to the board, please optimize it.
・The decoupling capacitor must be used the temperature property B rank more over.
※1 ~ ※2 There is a possibility that the change of the recommended value is generated by the evaluation result.
2015/10/01
Enactment Revision
Specifications
Description
Digital GND
Analog 3.3V power supply
Analog 3.3V power supply
Analog 3.3V power supply
Analog 3.3V power supply (Substrate)
Analog 3.3V power supply
Up converter (4V)
Digital GND
Digital GND
NC terminal
NC terminal
NC terminal
Digital 3.3V power supply
Digital 3.3V power supply
Down converter
Digital 1.8V GND
Digtal 1.8V power supply
Digtal 1.2V power supply
Digtal 1.2V power supply
Digital GND
Digital 1.8V GND
Digtal 1.8V power supply
Digtal 1.2V power supply
Digtal 1.2V power supply
Digital GND
Down converter
I/O Processing
G
P Decoupling capacity (4.7μF) is arranged between AGNDP
P Decoupling capacity (4.7μF) is arranged between AGNDP
P Decoupling capacity (2.2μF) is arranged between AGNDR
O
Zdiff=100Ω(under ±1%)
O
O Zdiff=100Ω(under ±1%)
P Decoupling capacity (2.2μF) is arranged between AGNDP.
P Decoupling capacity (2.2μF) is arranged between AGNDPL.
IO Connect 2.2μF bypath capacitance between AGND ※ 1
O
Zdiff=100Ω(under ±1%)
O
O Zdiff=100Ω(under ±1%)
G
G
- open or GND
- open or GND
- open or GND
P Decoupling capacity (2.2μF) is arranged between GND.
P Decoupling capacity (2.2μF) is arranged between GND.
IO Connect 1.0μF bypath capacitance between AGND ※ 1
O Zdiff=100Ω(under ±1%)
G
P Decoupling capacity (2.2μF) is arranged between GNDL.
P Decoupling capacity (2.2μF) is arranged between GND.
P Decoupling capacity (2.2μF) is arranged between GND.
G
IO open
O Zdiff=100Ω(under ±1%)
G
P Decoupling capacity (2.2μF) is arranged between GNDL.
P Decoupling capacity (2.2μF) is arranged between GND.
P Decoupling capacity (2.2μF) is arranged between GND.
G
IO Connect 1.0μF bypath capacitance between AGND ※1
Generalplus Technology Inc.
Panasonic Semiconductor Solutions Co., Ltd.
MN34120PAJ
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