Wavetek 3000 Instruction Manual page 36

THEORY OF OPERATION
3 .13 M32A - MHz STEPS
The M32A provides, for the M34, a refer-
ence frequency which corresponds to the
setting
on the "MHz" switches . (See
block diagram, Figure 3-18 .)
The M32A
output range is 1448 to 1487 MHz, which
repeats itself with every 40 MHz change
of the frequency switches . Any specific
M32A output relates to the "MHz" switch
setting (S.) by the equation (Output =
(1448 + R) MHz), where R is the Remain
der of dividing S by 40 . If the front-
panel is set, formexample, for 333 .000,
R would be 13
(333 .000 + 40 = 8 with a
Remainder of 13) . The output of the
M32A would then be 1448 + 13 = 1461 MHz .
3 .13 .1 VCO
The output of the M32A is produced by a
Voltage Controlled Oscillator .
This
VCO is coarsely
tuned by the repeating
analog output of the 2122 . Pine tuning
is the result of including the VCO in a
phase-locked loop . In addition to the
VCO, the phase-locked loop includes a
phase detector and Programmable Divider .
3 .13 .2
PROGRAMMABLE DIVIDER
A sample of the VCO output is mixed with
the 1440 MHz signal from the crystal
Reference
producing a difference fre-
quency of from 8 to 47 MHz, which is then
shaped into TTL pulses and applied to the
Programmable Divider .
The Divider counts the falling edges of
the 8-47 MHz input pulses, resetting
each time a count of 47 is reached .
The reset pulse is applied to one input
of the phase detector . By controlling
the starting count of the Programmable
Divider, the effective divisor can be
controlled .
The starting count of the Programmable
Divider is selected by a Read Only
Memory, which is programmed to provide
the correct "R" information for each
"S, :h" setting .
This "R" is then applied
3-18
to the
Programmable Divider as
the
starting count .
Thus, as the starting
count varies from 0 to 39,
the
effective divisor varies from 47 to 8 .
When the VCO is running at the correct
frequency,
the Programmable Divider
reset pulse rate will be 1 MHz .
3 .13 .3
PHASE DETECTOR
One input to the phase detector is the
reset pulse from the Programmable
Divider . The other input is a 1 MHz
fixed reference signal from the Crystal
Reference . The phase detector output
is a voltage determined by the
difference in
phase at the phase
detector inputs, and is used to correct
any error in the VCO frequency or
phase .
If the VCO output
frequency is too
high, for example, the phase detector
output becomes more negative, thus
increasing the VCO varactor diode
tuning capacitance and lowering the VCO
frequency .
If the VCO frequency is too
low, the reverse occurs . Thus, .the loop
will tend to maintain zero phase or
frequency error .
A voltage-controlled
attenuator between the phase detector
circuit and the VCO keeps the open-loop
gain of the phase-locked loop relatively
constant
over the programmed frequency
range, allowing the loop noise to be
minimized .
3 .13 .4
UNLOCKED INDICATOR
When the phase-locked loop is unlocked,
the LED on top of the module will light
and the front-panel ACCURACY lights will
flash .
A window detector monitors the voltage
level which is being fed from the phase
detector to the VCO .
If the iroltage
exceeds the normal operating range,
power is applied to the module light and
the flasher circuit am the
Modulation
Board .