Wavetek 3000 Instruction Manual page 22

THEORY OF OPERATION
PLL #1
The purpose of PLL #1 is to generate a
CW signal which changes in 1
kHz
steps
from 10 .000 to 9 .001
MHz
as the front
panel frequency selector is switched
from .000
MHz
to .999
MHz .
This signal
will be used as
a reference signal for
PLL #4 .
Figure 3-2 shows a simplified block dia-
gram of PLL #1 . It consists of a voltage
controlled oscillator capable of frequen-
cies from 9 to 10
MHz,
a phase detector
and a jN counter .
A sample of the output
signal from the VCO is fed to a program-
mable counter .
The divisor of the
counter is controlled by the three front
panel
kHz
selector switches . The output
from the counter is fed to a phase de-
tector where it is compared to a 1
kHz
3-4
/NP!/T PROG-
l MHz
XTAL
REF
PLL #2
Figure 3-3 . PLL #2
crystal reference signal . If the two
input signals to the phase detector are
not the same frequency, an error signal
is produced . This error voltage corrects
the frequency of the
VCO
until
the
phase detector input from the counter is
exactly 1
kHz .
The purpose of PLL #2 is to generate a
CW signal which changes in 1
MHz
steps
from 1448 to 1487
MHz when the front
panel frequency selector is switched from
000 . to 039 .
MHz .
These CW steps are
then repeated every 40
MHz
throughout
the entire 0 to 520
MHz
range . Use of
this signal to control the Wide Oscil-
lator will be discussed in the descrip-
tion of PLL #4 .
MIXER
OUTPUT
OUTPUT
FREQ,
MHz
iYlNz
000 .
- 8
/448
00/.
9 _
- 9 /449
r
-s-
s ___Sr-
039. 47
- 47 1487
040 9
B /448
04/
9
9
/449