Memory Connector Cn10 And Cn11; Table 26. Memory Connector Cn10 - ST User Manual User Manual

UM1902
6.9

Memory connector CN10 and CN11

Two 40-pin male headers CN10 and CN11 are used to connect with memory
daughterboard. GPIOs (which work as FMC memory signals) that are not present on CN5
and CN6, are available on these two connectors.
The space between these two connectors is defined as a standard, which allows to develop
common daughterboards. The standard width between CN10 pin 1 and CN11 pin 1 is
1914 mils (48.62 mm). For details on the signals assignment refer to
Pin Description
1 PH3
3 PF13
5 PF12
7 PG1
9 GND
11 PE7
13 PE10
15 PE12
17 PE15
19 PE13
21 PD11
23 PD12
25 PG5
27 PH11
29 GND
31 PD13
33 PG2
35 PD8
37 PD9
39 PD14
2 PH5
4 PF14
6 PG0
8 PF11
10 GND
12 PE9
14 PE8
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Table 26. Memory connector CN10

Alternative function
SDNE0/MII_COL
A7
A6
A11
-
D4
D7
D9
D12
D10
A16
A17
A15/BA1
D19
-
A18
A12
D13
D14
D0
SDNWE
A8
A10
SDNRAS
-
D6
D5
DocID027916 Rev 2
Table 26
How to disconnect with function block on
STM32746G-EVAL board
Open SB47
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Connector
and Table 27.
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