Epson S1D13503 Series Technical Manual page 55

AUX[0D] Address Pitch Adjustment Register
I/O address = 1101b, Read/Write
Addr Pitch Addr Pitch
Adjustment Adjustment
Bit 7
bits 7–0 Address Pitch Adjustment Bits [7:0]
This register controls the virtual display by setting the numerical difference between the
last address of a display line, and the first address in the following line.
If the Address Pitch Adjustment is not equal to zero, then a virtual screen is formed. The
size of the virtual screen is only limited by the available display memory. The actual dis-
play output is a window that is part of the whole image stored in the display memory. For
example, with 128K of display memory, a 640 × 400 16-gray image can be stored. If the
output display size is 320 × 240, then the whole image can be seen by changing display
starting addresses through AUX[06] and [07], and AUX[08] and [09]. Note that a virtual
screen can be produced on either a single or dual panel.
In 8-bit memory interface, if the Address Pitch Adjustment is not equal to zero, a virtual
screen with a line length of (Line Byte Count + AUX[0D]) bytes is created, with the dis-
play reflecting the contents of a window (Line Byte Count + 1) bytes wide. The position
of the window on the virtual screen is determined by AUX[06] and [07], and AUX[08]
and [09].
In 16-bit memory interface, if the Address Pitch Adjustment is not equal to zero, then a
virtual screen with a line length of 2 × (Line Byte Count + AUX[0D]) bytes is created,
with the display reflecting the contents of a window 2 × (Line Byte Count + 1) bytes
wide. The position of the window on the virtual screen is determined by AUX[06] and
[07], and AUX[08] and [09].
AUX[0E] Look-Up Table Address Register
I/O address = 1110b, Read/Write
Green Bank Green Bank
Bit 1
The S1D13503 has three internal 16 position, 4-bit wide Look-Up Tables (palettes). The 4-bit value
programmed into each table position determines the output gray shade / color weighting of display
data. These tables are bypassed in black-and-white (BW) display mode.
These three 16 position Look-Up Tables can be arranged in many different configurations to accom-
modate all the gray shade / color display modes.
Refer to "Look-Up Table Architecture" on page 48 for formats.
bits 7–6 Green Bank Bits [1:0]
In 4-level gray / color display modes (2 bits/pixel), the 16 position Green palette is
arranged into four, 4 position "banks". These two bits control which bank is currently
selected. These bits have no effect in 16-level gray / color display modes (4 bits/pixel).
In 256 color display modes (8 bits/pixel), the 16 position Green palette is arranged into
two, 8 position "banks" for the display of "green" colors. Only bit 0 of these two bits con-
trols which bank is currently selected.
S18A-A-011-01
Addr Pitch Addr Pitch
Adjustment Adjustment
Bit 6 Bit 5
ID Bit / RGB ID Bit / RGB
Bit 0 Index Bit 1 Index Bit 0
S1D13503 Series Hardware Functional Specification
Addr Pitch Addr Pitch
Adjustment Adjustment
Bit 4 Bit 3
Palette
Address
Bit 3
Addr Pitch
Adjustment
Bit 2 Bit 1
Palette Palette
Address Address
Bit 2 Bit 1
Addr Pitch
Adjustment
Bit 0
Palette
Address
Bit 0
1-45