Epson S1D13503 Series Technical Manual page 82

EPSON
AUX
Data
Register
(in Binary)
AUX[0Ah] 1110 1111 • bits 7–0 = bits 7–0 of Screen 1 Display Line Count
AUX[0Bh] 0000 0000 • bits 7–2 = don't care; recommend clearing bits
AUX[0Ch] 0000 0000 normally programmed to 00h (panel specific)
AUX[0Dh] 0000 0000 normally programmed to 00h (normal)
AUX[0Eh] 0000 0000 select palette address
AUX[0Fh] 0000 0000 write Red data
AUX[0Fh] 0000 0000 write Green data
AUX[0Fh] 0000 0000 write Blue data
AUX[0Eh] 0000 0001 increment palette address
AUX[0Fh] 0000 0010 write Red data
AUX[0Fh] 0000 0010 write Green data
AUX[0Fh] 0000 0101 write Blue data
AUX[0Eh] 0000 0010 increment palette address
AUX[0Fh] 0000 0100 write Red data
AUX[0Fh] 0000 0100 write Green data
AUX[0Fh] 0000 1010 write Blue data
AUX[0Eh] 0000 0011 increment palette address
AUX[0Fh] 0000 0110 write Red data
AUX[0Fh] 0000 0110 write Green data
AUX[0Fh] 0000 1111 write Blue data
AUX[0Eh] 0000 0100 increment palette address
AUX[0Fh] 0000 1001 write Red data
AUX[0Fh] 0000 1001 write Green data
AUX[0Fh] 0000 1111 write Blue data
AUX[0Eh] 0000 0101 increment palette address
AUX[0Fh] 0000 1011 write Red data
AUX[0Fh] 0000 1011 write Green data
AUX[0Fh] 0000 1010 write Blue data
AUX[0Eh] 0000 0110 increment palette address
AUX[0Fh] 0000 1101 write Red data
AUX[0Fh] 0000 1101 write Green data
AUX[0Fh] 0000 0101 write Blue data
AUX[0Eh] 0000 0111 increment palette address
AUX[0Fh] 0000 1111 write Red data
AUX[0Fh] 0000 1111 write Green data
AUX[0Fh] 0000 0000 write Blue data
AUX[0Eh] 0000 1000 increment palette address
AUX[0Fh] 0000 1111 write Red data
AUX[0Fh] 0000 1111 write Green data
AUX[0Fh] 0000 0001 write Blue data
AUX[0Eh] 0000 1001 increment palette address
AUX[0Fh] 0000 1101 write Red data
AUX[0Fh] 0000 1101 write Green data
AUX[0Fh] 0000 0110 write Blue data
AUX[0Eh] 0000 1010 increment palette address
AUX[0Fh] 0000 1011 write Red data
2-6
Notes
bits 9–8 of Screen 1 Display Line Count in bits 1–0 of
AUX[0Bh]
Screen 1 Display Line Count is typically the same as Total Dis-
play Line Count (AUX[0Ah] = AUX[04h], bits 1-0 of
AUX[0Bh] = bits 1-0 of AUX[05h])
• bits 1–0 = bits 9–8 of Screen 1 Display Line Count (applica-
tion specific, see AUX[0Ah])
• bits 7–0 = use fixed default non-display period
• bits 7–0 = no address pitch adjustment when 0
• bits 7–6 = green bank 0 (application specific)
• bits 5–4 = auto increment palette R/W access (application
specific)
• bits 3–0 = palette address (application specific)
• bits 7–6 = red bank 0 (application specific)
• bits 5–4 = blue bank 0 (application specific)
• bits 3–0 = palette data (application specific)
See Also
see Section 5.4, "Split Screen"
on page 31
see Section 5.1, "Virtual Dis-
plays" on page 27
S18A-G-002-02