Non-Isa Bus Support; Sram Support; Monochrome Lcd Support - Epson S1D13503 Series Technical Manual

Dot matrix graphics lcd controller
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3.2 Non-ISA Bus Support

This evaluation board was specifically designed to support the standard 8/16-bit ISA bus. However,
as the S1D13503F00A does support other bus interfaces, header strips have been provided contain-
ing all necessary I/O pins. (See Table 2-1, "Configuration DIP Switch Settings," on page 2, "Hard-
Wired Configuration Inputs" on page 2, and "CPU/Bus Interface Header Strips" on page 9, for
details.)
When using the header strips to provide the bus interface observe the following:
1. All I/O signals on the ISA bus card edge must be isolated from the ISA Bus (do not plug the card
into a computer). Voltage lines are provided on the header strips.
2. U2, a TIBPAL22V10 PAL, is currently used to provide the S1D13503F00A IOCS# (pin 23) and
MEMCS# (pin 22) input signals for ISA bus use. This functionality must now be provided exter-
nally as U2 must be removed.
3. Linear addressing of the entire 128K bytes of video RAM is available. Due to the memory bank-
ing method used for ISA bus support, U2 must be removed and H2, pin 21, must be physically
connected to U2, pin20, in order to provide SA16 to U1.
4. If it becomes necessary / desirable to change the configuration information associated with
VD[15:0], additional 10K Ohm pull-up resistors can be added to those affected VD lines as there
are place holders available on the PCB.

3.3 SRAM Support

The S5U13503P00C board supports 16-bit wide, 128K byte SRAM. In order for the
S5U13503P00C to operate in conjunction with a VGA card and not cause memory space conflicts,
all 128K bytes of memory is available through two 64K byte banks. The first 64K bank is selected
by reading from the base I/O mapping address + 2 (address $312 if the I/O address is $310) and the
second 64K bank is selected by writing to I/O address + 2 (address $312 if the I/O address is $310).
The display memory banks reside at the 64K byte memory segment $D.
I/O read $312
I/O write $312

3.4 Monochrome LCD Support

The S1D13503F00A directly supports 4/8-bit Dual and Single monochrome LCD panels. All the
necessary signals are provided on the 40-pin ribbon cable header. The interface signals are alternated
with grounds on the cable to reduce cross talk and noise related problems.
Refer to Table 2-4, "LCD Signal Connector J1 Pinout," on page 3 for specific settings.
S18A-G-007-01
S5U13503P00C Rev. 1.0 Evaluation Board User's Manual
:select memory bank 0
:select memory bank 1
4-7

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