Quectel SC600Y-EM Series Hardware Design page 77

The following is a reference circuit design for three-camera applications.
MCAM_ RST
MCAM_PWDN
MCAM_MCLK
CAM_I2C_SDA
CAM_I2C_SCL _
CSI0_LN3_P
CSI0_LN3_N
CSI0_LN2_P
CSI0_LN2_N
CSI0_LN1_P
CSI0_LN1_N
CSI0_LN0_P
CSI0_LN0_N
CSI0_CLK_P
CSI0_CLK_N
S CAM_ RST
S CAM_ PWDN
S CAM_ MCLK
CSI2_ CLK_P
CSI2_ CLK_N
CSI2_LN0_P
CSI2_LN0_N
CSI2_LN1_P
CSI2_LN1_N
CSI1_LN0_P
CSI1_LN0_N
CSI1_CLK_P
CSI1_CLK_N
DCAM_RST
DCAM_PWDN
DCAM_MCLK
DCAM_I2C_SDA _
DCAM_I2C_SCL
Figure 25: Reference Circuit Design for Three-Camera Applications
NOTE
CSI1 data lines CSI1_LN2_P, CSI_LN2_N, CSI_LN3_P and CSI_LN3_N can be multiplexed into MIPI
signals for the fourth camera in four-camera application.
SC600Y&SC600T_Hardware_Design
SC600Y&SC600T Hardware Design
AF_ VDD
LDO17_2P85
LDO22_2P8
LDO2_1P1
LDO6_1P8
EMI
EMI
EMI
EMI
EMI
1uF
4.7 uF
LDO23_1P2
1uF
EMI
EMI
EMI
uF
4.7
1uF
EMI
EMI
2.2K
2.2K
Smart LTE Module Series
AVDD
DVDD
DOVDD
DOVDD
AVDD
DVDD
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