Quectel SC600Y-EM Series Hardware Design page 68

Smart lte module
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LCD_BL_A
LCD_BL_K1
LCD_BL_K2
LCD_BL_K3
LCD_BL_K4
LCD0_RST
LCD0_TE
LCD1_RST
LCD1_TE
DSI0_CLK_N
DSI0_CLK_P
DSI0_LN0_N
DSI0_LN0_P
DSI0_LN1_N
DSI0_LN1_P
DSI0_LN2_N
DSI0_LN2_P
DSI0_LN3_N
DSI0_LN3_P
DSI1_CLK_N
DSI1_CLK_P
DSI1_LN0_N
SC600Y&SC600T_Hardware_Design
Current output for LCD
21
PO
backlight
Current sink for LCD
22
AI
backlight
Current sink for LCD
23
AI
backlight
Current sink for LCD
24
AI
backlight
Current sink for LCD
25
AI
backlight
127
DO
LCD0 reset signal
126
DI
LCD0 tearing effect signal
113
DO
LCD1 reset signal
114
DI
LCD1 tearing effect signal
LCD0 MIPI clock signal
116
AO
(negative)
LCD0 MIPI clock signal
115
AO
(positive)
LCD0 MIPI lane 0 data
118
AO
signal (negative)
LCD0 MIPI lane 0 data
117
AO
signal (positive)
LCD0 MIPI lane 1 data
120
AO
signal (negative)
LCD0 MIPI lane 1 data
119
AO
signal (positive)
LCD0 MIPI lane 2 data
122
AO
signal (negative)
LCD0 MIPI lane 2 data
121
AO
signal (positive)
LCD0 MIPI lane 3 data
124
AO
signal (negative)
LCD0 MIPI lane 3 data
123
AO
signal (positive)
LCD1 MIPI clock signal
103
AO
(negative)
LCD1 MIPI clock signal
102
AO
(positive)
105
AO
LCD1 MIPI lane 0 data
Smart LTE Module Series
SC600Y&SC600T Hardware Design
Active low.
Active low.
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