Overview; Power Rails; Bypass Capacitors - Renesas 8V19N49 Series Manual

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8V19N49x Hardware Design Guide
1.

Overview

As indicated, this document provides board-level hardware design guidelines for the 8V19N49x product family.
The document also recommends power rail handling, loop filter calculation, and input/output termination. A
general schematic example is shown in
nQ_VCXO
Q_VCXO
R51
R52
50
50
Close to the
R53
50
pins if
possible
LVPECL Termination Example
There are many way to
C1
terminate LVPECL driver
0.1u
VDD_QCLKA
C7
100p
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6DPH FLUFXLW FDQ EH GXSOLFDWHG IRU
&/.Q&/. LQSXW
R11
Close to
R10
the pin
5.1K
'LIIHUHQWLDO 6LJQDO
5.1K
C15
Zo
2 x Zo
Zo
LVDS Driver
C17
R15
R14
10K
10K
C27
100p
C31
33p
Place on the Top Layer
Place close to
the DUT
Keep this trace from
noisy source
Loop Filter values shown here are
example only. Other values can also
be used. It depends on the system
loop band width requirementn.
2.

Power Rails

2.1

Bypass Capacitors

Bypass capacitors are required to filter out the system noise from switching power supplies and switching signal
interference from other parts of the system.
PCB layout example is also available upon request. The type of bypass capacitor will depend on the noise level
and noise frequencies in the system environment. The synthesizer output driver switching can also cause power
rail noise. These noises can also interfere with other parts of the circuit or cause spur on other output channels.
The bypass capacitor values are usually in the range of 0.01uF to 0.1uF; however, other values can be used.
Typical capacitor sizes are 0603, 0402, or 0201 with low ESR. The dielectric types typically are X5R or X7R. The
smaller size allows the capacitor to be placed close to the power pin and reduces the trace length. Some capacitor
vendors such as AVX provide online tools and models to provide the frequency response of the capacitors.
Figure 2
to
Figure 5
show the frequency response of various value capacitors provided by the capacitor supplier
AVX. The frequency response plot shows that the smaller value capacitor can filter out high frequency noise and a
larger value capacitor can filter out lower frequency noise. Typical power supply switching frequency can be
R31UH0005EU0100 Rev.1.0
Jun 3, 2021
Figure
Layout Note: Place the bypass
capacitors (0201) next to the power
pins
QCLKA0_N
A10
nQCLKA0
QCLKA0_P
A9
QCLK_A0
A8
GND_A8
A7
OSC
A6
LFV
LFV
QCLKA1_N
B10
nQCLK_A1
QCLKA1_P
B9
QCLK_A1
B8
VDD_OSC
B7
VDD3
nOSC
B6
VDD_CP
QCLKA2_N
C10
C5
nQCLK_A2
QCLKA2_P
0.1u
C9
QCLK_A2
C8
nINT
nINT
MCLK_P
C7
X1
C6
GND_C6
D10
VDD_CLKA
D9
VDD_QREFA
C8
D8
GND_D8
MCLK_N
0.1u
VDD_QREFA
D7
X2
D6
GND_D6
QREFA2_N
C12
E10
nQREF_A2
0.1u
QREFA2_P
E9
QREF_A2
E8
SDAT
SDAT
E7
GND_E7
E6
GND_E6
QREFA1_N
F10
nQREF_A1
QREFA1_P
F9
QREF_A1
RES_CAL
F8
RES_CAL
CLK0
F7
CLK0
CLK1
F6
CLK1
R13
QREFA0_N
G10
nQREF_A0
QREFA0_P
G9
QREF_A0
G8
LOCK
LOCK
G7
nCLK0
nCLK0
nCLK1
G6
nQCLK1
R16
H10
GND_H10
2.8K, 1%
H9
GND_H9
VDD_SYNC
H8
GND_H8
H7
VDD_SYNC
H6
GND_H6
C22
0.1u
QCLKE1_N
J10
nQCLK_E1
QCLKE1_P
J9
QCLK_E1
J8
GND_J8
J7
GND_J7
J6
GND_J6
QCLKE0_N
K10
nQCLK_E0
VDD_QCLKE
QCLKE0_P
K9
QCLK_E0
K8
VDD_QCLKE
C28
K7
VDD_CPF
0.1u
VDD_CP2
K6
LFF
C29
0.1u
LFF
R18
LFFR
100
VCO-VC
Keep this trace from noisy source
C32
0.1u
R22
33k
C37
1u
Place close to DUT Pins
Figure 1. 8V19N490 Schematic Example
Figure 1
1. A more detailed version is available upon request.
U1
QCLKB0_N
A1
nQCLKB0
A2
QCLKB0_P
QCLKB0
A3
VDD_QCLKB
QREFB0_P
A4
nQREF_B0
QREFB0_N
A5
QREF_B0
B1
QCLKB1_N
nQCLK_B1
QCLKB1_P
B2
QCLKB1
B3
VDD_QREFB
B4
QREFB1_N
nQREF_B1
QREFB1_P
B5
QREF_B1
C1
GND_C1
C2
GND_C2
C3
GND_C3
C4
VDD_QREFD
C5
SELSV
D1
QCLKD0_N
nQCLK_D
D2
QCLKD0_P
QCLK_D
D3
VDD_CLLKD
QREFD0_N
D4
nQREF_D
D5
QREFD0_P
QREF_D
E1
GND_E1
E2
VDD_SPI
GND_E2
E3
VCC_SPI
E4
nCS
nCS
E5
SCLK
SCLK
QREFC0_N
F1
nQREF_C0
QREFC0_P
F2
QREF_C0
F3
EXT_SYS
EXT_SYS
F4
CLK3
CLK3
F5
CLK2
CLK2
G1
QREFC1_N
nQREF_C1
QREFC1_P
G2
QREF_C1
G3
VDD_INP
G4
nCLK3
nQCLK3
G5
nCLK2
nQCLK2
H1
VDD_CLKC
H2
VDD_QREF_C
H3
GND_H3
H4
GND_H4
H5
GND_H5
J1
QCLKC0_N
nQCLK_C0
J2
QCLKC0_P
QCLLK_C0
J3
GND_J3
J4
VDD_LCV
J5
CR0
K1
nQCLK_C1
K2
QCLK_C1
K3
GND_K3
K4
VDD_LCF
K5
LFFR
C30
IDT8V19N490
0.1u
VCC_VCXO
VCXO-VC
TP1
R19
np (49.9)
LFV
R20
51k
VC
OE
R24
np (49.9)
C34
C35
4.7n
27n
Place close
toVCXO Pins 1
shows examples of bypass capacitors on the schematic. A
VDD_QCLKB
C2
C3
0.1u
100p
VDD_QREFB
VDD_SPI
C4
0.1u
R7
1k
VDD_QREFD
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JP1
C6
0.1u
VDD_QCLKD
QCLKx
Zo = 50
C9
C10
100p
0.1u
nQCLKx
Zo = 50
C13
0.1u
VDD1
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C16
0.1u
HTXLSPHQW PRQLWRULQJ HJ SKDVH QRLVH PHDVXUHPHQW
VDD_QCLKC
VDD_QREFC
QCLKx
C18
C19
0.1u
100p
C21
0.1u
nQCLKx
VDD_LCV
C24
0.1u
VDD_LCF
C26
4.7u
VDD_LCF(Clean)
VCC_VCXO
U5
1
6
VCONT
VCC
2
5
OE
nQ
3
4
GND
Q
There are many way to
VCXO_5mmx7mm_6pin_long_pad
terminate LVPECL driver
VCXO=122.88 MHz
LVPECL
C38
C39
0.1uF
100pF
Zo = 50
+
R5
100
-
Zo = 50
High Impedance Input
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VDD
R8
C11
10K
+
R9
C14
100
-
High Impedance
1R %XLOWLQ
R12
7HUPLQDWLRQ
10K
C20
QCLKA0
J1
0.1u
C23
nQCLKA0
J2
0.1u
nQ_VCXO
Q_VCXO
Page 2

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