Renesas 8V19N49 Series Manual page 16

8V19N49x Hardware Design Guide
3.3V
R1//(R3+R5) = 50 ohm
3.3V*(R3+R5)/(R1+R3+R5) = 1.3V
Figure 24. LVPECL 750mV to LVDS Receiver with High Input Impedance
2 2 0 0 . 0
2 0 0 0 . 0
1 8 0 0 . 0
1 6 0 0 . 0
1 4 0 0 . 0
1 2 0 0 . 0
1 0 0 0 . 0
8 0 0 . 0
6 0 0 . 0
4 0 0 . 0
0 . 0 0
R31UH0005EU0100 Rev.1.0
Jun 3, 2021
3.3V LVPECL Zo = 50
Zo = 50
O S C IL L O S C O P E
D e s ig n file : U N N A M E D 0 . T L N
H y p e rL y n x V 7 . 7
2 . 0 0 0 4 . 0 0 0
T i m e (n s)
D a t e : T h u rs d a y S e p . 1 1 , 2 0 0 8
C u rs o r 1 , V o lt a g e = 1 . 3 9 1 6 V , T im e = 2 . 4 9 1 n s
C u rs o r 2 , V o lt a g e = 8 5 5 . 4 m V , T im e = 6 . 9 8 2 n s
D e lt a V o lt a g e = 5 3 6 . 1 m V ,
S h o w L a t e s t W a ve fo rm = Y E S
Figure 25. Simulation Waveforms at the Receiver Pins
3.3V
R1 R2
133 133
R4
27
R3
27
R6
R5 56
56
D e s ig n e r: M in g L im
6 . 0 0 0 8 . 0 0 0
T im e : 1 1 : 5 0 : 3 9
D e lt a T im e = 4 . 4 9 1 n s
3.3V or 2.5V
+
-
LVDS
V [ R D ( C 0 ) . 1 ( a t p i n ) ]
V [ R S ( B 1 ) . 2 ( a t p i n ) ]
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