Renesas 8V19N49 Series Manual page 3

8V19N49x Hardware Design Guide
approximately 50KHz to 2MHz. Switching noise from other parts of the system can be varied. A combination of
various values are suggested to cover low frequency and high frequency noise.
To minimize ESR between power pins and the bypass capacitors, Renesas suggests at least one bypass cap per
power pin and to place these capacitors as close as possible to the power pins. Thicker trace widths between the
bypass capacitor and power pin can also help reduce the ESR.
Figure 2. Example of a 100nF Bypass Capacitor Frequency Response
Figure 3. Example of a 10nF Bypass Capacitor Frequency Response
R31UH0005EU0100 Rev.1.0 Page 3
Jun 3, 2021