Table of Contents
Advertisement
Intel® Server System M50CYP2UR Family System Integration and Service Guide
Error Code
Recovery boot has been initiated.
Note: The Primary BIOS image may be corrupted or the
8607
system may hang during POST. A BIOS update is
required.
A100
BIOS ACM Error
A421
PCI component encountered a SERR error
A5A0
PCI Express component encountered a PERR error
A5A1
PCI Express component encountered an SERR error
DXE Boot Services driver: Not enough memory available
A6A0
to shadow a Legacy Option ROM.
F.1
POST Error Beep Codes
The following table lists the POST error beep codes. Prior to system video initialization, the BIOS uses these
beep codes to inform users on error conditions. The beep code is followed by a user-visible code on the
POST progress LEDs.
Beeps
Error Message
1 short
USB device action
3 short
Memory error
3 long
and 1
CPU mismatch error
short
The integrated BMC may generate beep codes upon detection of failure conditions. Beep codes are sounded
each time the problem is discovered, such as on each power-up attempt, but are not sounded continuously.
Codes that are common across all Intel server boards and systems that use same generation chipset are
listed in the following table. Each digit in the code is represented by a sequence of beeps whose count is
equal to the digit.
Code
1-5-2-1
No CPUs installed or first CPU socket is empty
MSID mismatch occurs if a processor is installed into a system
1-5-2-4
board that has incompatible power capabilities.
1-5-4-2
DC power unexpectedly lost (power good dropout) – Power unit
sensors report power unit failure offset.
1-5-4-4
Power control fault (power good assertion timeout).
1-5-1-2
VR Watchdog Timer sensor assertion
The system does not power on or unexpectedly power off and a
1-5-1-4
power supply unit (PSU) is present that is an incompatible model
with one or more other PSUs in the system
Error Message
Table 13. POST Error Beep Codes
POST Progress Code
N/A
Multiple
E5, E6
Table 14. Integrated BMC Beep Codes
Reason for Beep
Action message
Disable OpRom at SETUP to save
runtime memory.
Short beep sounded whenever USB device is discovered in POST
or inserted or removed during runtime.
System halted because a fatal error related to the memory was
detected.
System halted because a fatal error related to the CPU
family/core/cache mismatch was detected.
CPU Missing Sensor
MSID Mismatch Sensor
Power fault
Power unit – soft power control failure offset
VR Watchdog Timer
PS Status
Description
Associated Sensors
Type
Fatal
Major
Fatal
Minor
Fatal
Minor
143
Advertisement
Table of Contents
