ILX Lightwave MPS-8033 Series User Manual page 82

*PRE?
Action
Response
*PSC <nrf value>
Power−on Status Clear
Action
Values
Notes
Examples
*PSC?
Power−on Status Clear?
7/01
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Determines the contents of the PARALLEL POLL ENABLE REGISTER.
The value must be between 0 and 65535. Binary Integer Sum of:
15 14131211 10
&
&
&
&
&
&
Logical
OR
15 14 13 12 11 10
IST TRUE
Sets automatic power−on clearing of the enable registers.
0 = disable power−on clearing
1 = enable power−on clearing
Any non−zero value is interpreted as 1.
Registers affected:
Condition Status Enable
Event Status Enable
Factory default condition: disabled.
In the disabled state, the values of the enable registers are saved through power OFF/ON. The
power−on status clear flag (see PSC?) is set false, disallowing service request interrupts after
power−on.
In the enabled state, the enable registers are cleared during power ON. The power−on status clear
flag (see PSC?) is set true, allowing service request interrupts after power−on.
Disable automatic power−on clearing of the enable registers.
*PSC 0
Enable automatic power−on clearing of the enable registers.
*PSC 1
C O M M A N D R E F E R E N C E
GPIB Command Reference
Copy of Status Byte
9 8 7 6 5 4 3 2 1 0
&
&
&
&
&
&
&
&
&
&
8
9 Parallel Poll Enable Register
7 6 5 4 3 2 1 0
Service Request Enable
Standard Event Status Enable
4
C H A P T E R
C
OMMON
D D
EVICE EPENDENT
F P
RONT ANEL
C
OMMON
D D
EVICE EPENDENT
F P
RONT ANEL
C
OMMON
D D
EVICE EPENDENT
F P
RONT ANEL
65
MPS-8033 !