Register Structure And Contents; Condition Status Register Pair - ILX Lightwave MPS-8033 Series User Manual

Register Structure and Contents

This section provides information about the structure and contents of the different internal registers.

Condition Status Register Pair

Condition Status is a 16−bit register/enable−register pair with this structure:
Logical
OR
To Bit 1, Status Byte Register
Bit Reference:
0− Output On
1− Interlock Disabled
2− N/A
3− N/A
The Condition Status Enable Register allows you to control which events in the Condition Status
Register can set bit 3 in the status byte register. Note that this register pair is identical to the Event
Status register pair (above), except for bit 11.
Conditions reflect the current state of the 8033, and so may change often. Querying the Condition
Status Register does NOT change its contents.
Related commands: (See Chapter 4, Command Reference for details).
• *COND?˙Query the contents of the Condition Status Register.
• *ENABle:COND <nrf>˙Set an enable mask in the Condition Status Enable Register.
• *ENABle:COND?˙Query the Condition Status Enable Register mask settings.
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15 14 1312 11 10 9 8
&
&
&
&
&
&
&
&
9 8
15 14 13 12 11 10
IST TRUE
4− N/A
5− N/A
6− N/A
7− N/A
R E M O T E O P E R A T I O N
Status Reporting
Condition Status Register
Copy of Status Byte
7 6 5 4 3 2 1 0
&
&
&
&
&
&
&
&
Condition Status Enable Register
7 6 5 4 3 2 1 0 Parallel Poll Enable Register
8− N/A
9− N/A
10− N/A
11− Cal Ready
C H A P T E R
12− Calculation Error
13− Hardware Error
14− Software Error
15− Checksum Error
MPS-8033 !
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