Pin Mapping Pmod To Fmc; Txs0108E Bidirectional Voltage Level Translator - Xilinx VCK190 Series User Manual

The voltage translators shown in the figure are the TXS0108E 8-bit bidirectional level shifter
voltage translators for open drain and push-pull applications. The input voltage for the I/O to the
level translator is controlled from the VADJ, which operates in the range of 1.5V to 3.3V. With
the Versal ACAP, the I/O voltage on the XPIO (which is the primary I/O of the FMC) is a
maximum of 1.5V, so the default setting for using this FMC Pmod card is VADJ = 1.5V on the
XPIO I/O. On the output side of the level translator, this is converted to a 3.3V signal because
the Pmod specification is at 3.3V. 5V is also supported per the Pmod specification, but this
voltage is not supported without modification to the output power supplies of the level
translator, which are fixed at 3.3V for the XM119 FMC board.
Note: This level translator was specifically chosen to allow bidirectional signaling at lower frequencies, such
as for I2C. The Pmod board is generic and can work with both the VCK190 and VMK180 development
kits. The pinouts are identical between the boards, and usage should be straightforward.

Pin Mapping Pmod to FMC

The pin mapping is straightforward. The ACAP pins are connected to the input to the level
translators, which map to the output pins on the Pmod connector at 3.3V. See
details.
UG1366 (v1.0) January 7, 2021
VCK190 Board User Guide
Figure 29: TXS0108E Bidirectional Voltage Level Translator
Appendix C: Pmod FMC
X24766-102620
Figure 29
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