Boot Mode Select Switch (Jp6); Bypass Mode Select Switch (Jp7) - Analog Devices ADSP-2191 EZ-KIT Lite Manual

Boot Mode Select Switch (JP6)

The boot mode select switch determines how the processor boots.
Table 3-3 shows the jumper settings for the boot modes.
Table 3-3. Boot Mode Select Jumper (JP6) Settings
OPMODE BMODE1
Pins 1 and 2 Pins 3 and 4
Installed Installed
Installed Installed
Installed Not Installed
Installed Not Installed
Not Installed Installed
Not Installed Installed
Not Installed Not Installed
Not Installed Not Installed

Bypass Mode Select Switch (JP7)

When the bypass mode jumper is not installed, the processor's core clock and
the input clock (CLKIN) run at the same speed. The evaluation board ships
with a 16-MHz oscillator. When
!
When you use VisualDSP++ to debug the processor, the core clock
must run at a minimum of 24 MHz. The processor cannot be
debugged in bypass mode.
When the jumper is installed, the configuration of
core clock speed.
ADSP-2191 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
BMODE0 Function
Pins 5 and 6
Installed Execute from 16-bit external memory (no boot).
Not Installed Boot from EPROM
Installed Boot from Host (Default)
Not Installed Reserved
Installed Executed from 8-bit external memory (no boot)
Not Installed Boot from UART
Installed Boot from SPI, up to 4K bits
Not Installed Boot from SPI, >4K bits, up to 512K bits
is removed, the core runs at 16 MHz.
JP7
at reset determines the
SW4
3-9