Using Programmable Flag Pins - Analog Devices ADSP-2191 EZ-KIT Lite Manual

Evaluation system
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Table 2-1. EZ-KIT Lite Evaluation Board Memory Map (Cont'd)
Start Address
External
0x01 0000
Memory
0x08 0000
0x10 0000
0x40 0000
0x80 0000
0xC0 0000
Reserved
0xFF 0000
0xFF F400
Boot
0x01 0000
Memory
0x08 0000
0x10 0000
IO Mem-
0x00 0000
ory
0x00 2000
!
Although the Flash memory starts at address
Memory Space, during EPROM boot the address
the address bus.

Using Programmable Flag Pins

The ADSP-2191 processor has eight asynchronous Programmable Flag
(PF) IO pins (
pins 8-15 can also be used as Programmable Flag pins, depending on the con-
figuration of the DSP.
ADSP-2191 EZ-KIT Lite Evaluation System Manual
End Address
0x07 7FFF
0x0F FFFF
0x3F FFFF
0x7F FFFF
0xBF FFFF
0xFE FFFF
0xFF F3FF
0xFF FFFF
0x07 FFFF
0x0F FFFF
0xFE FFFF
0x00 1FFF
0x03 FFFF
) that let you interact with the running program. Data
PF7–0
Using EZ-KIT Lite
Page
1–7
External Memory (Bank 0)
8–15
512K x 8 Flash Memory (Bank 0)
16–63
External Memory (Bank 0)
64–127
External Memory (Bank 1)
128–191
External Memory (Bank 2)
192–254
External Memory (Bank 3)
255
24-Bit Boot ROM (Internal)
255
RESERVED (Internal)
1–7
Boot Memory
8–15
512 x 8 Flash Memory
1–254
Boot Memory
0–7
16-Bit Internal I/O Memory
8–255
16-Bit External I/O Memory
0x08 0000
0x00 0000
Content
in the Boot
is put on
2-3

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