Execution Cycles And Flags - Epson S1C33 Series Core Manual

6.2.2 Execution Cycles and Flags

The instructions in the C33 PE Core are processed in parallel at two pipelined stages as described above, so most
instructions are executed in one clock cycle. This comprises the basic execution cycle in the C33 PE Core.
Although instructions to transfer data between registers as in register direct addressing are executed in one clock
cycle, one or more wait cycles are inserted for accesses to external memory and low-speed external peripheral
circuits. These include clock cycles spent for the arbitration by the bus control unit, and wait cycles inherent in the
external devices connected to the chip. Note, however, that accesses to the internal RAM and caches are completed
in one clock cycle.
The number of clock cycles required for accesses to the internal RAM and caches, as well as flag changes that
occur pursuant to memory accesses, are given below.
C33 STD Core CPU compatible instructions
Table 6.2.2.1 Number of Instruction Execution Cycles and Flag Status (C33 STD Compatible Instructions)
Classification
Arithmetic operation
add
adc
sub
sbc
cmp
mlt.h
mltu.h
mlt.w
mltu.w
Branch
jrgt
jrgt.d
jrge
jrge.d
jrlt
jrlt.d
jrle
jrle.d
jrugt
jrugt.d
jruge
jruge.d
jrult
jrult.d
jrule
jrule.d
jreq
jreq.d
jrne
jrne.d
jp
jp.d
call
call.d
ret
ret.d
reti
retd
int
brk
S1C33 FAMILY C33 PE CORE MANUAL
Mnemonic Cycle
1
%rd,%rs
1
%rd,imm6
1
%sp,imm10
1
%rd,%rs
1
%rd,%rs
1
%rd,imm6
1
%sp,imm10
1
%rd,%rs
1
%rd,%rs
1
%rd,sign6
5
%rd,%rs
5
%rd,%rs
7
%rd,%rs
7
%rd,%rs
2–3
sign8
(∗1, ∗3)
2–3
sign8
(∗1, ∗3)
2–3
sign8
(∗1, ∗3)
2–3
sign8
(∗1, ∗3)
2–3
sign8
(∗1, ∗3)
2–3
sign8
(∗1, ∗3)
2–3
sign8
(∗1, ∗3)
2–3
sign8
(∗1, ∗3)
2–3
sign8
(∗1, ∗3)
2–3
sign8
(∗1, ∗3)
2–3 (∗3)
sign8
2–3 (∗3)
%rb
3–4 (∗3)
sign8
3–4 (∗3)
%rb
3–4 (∗3)
5
5
7
imm2
9
EPSON
Flag
C V Z N
↔ ↔ ↔ ↔
↔ ↔ ↔ ↔
– – – –
↔ ↔ ↔ ↔
↔ ↔ ↔ ↔
↔ ↔ ↔ ↔
– – – –
↔ ↔ ↔ ↔
↔ ↔ ↔ ↔
↔ ↔ ↔ ↔
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
↔ ↔ ↔ ↔
PSR change
– – – –
– – – – IE = 0
– – – – IE no change
6 FUNCTIONS
Remark
49