Ld.h %Rd, [%Rb] - Epson S1C33 Series Core Manual

Cmos 32-bit single chip microcomputer
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ld.h %rd, [%rb]+

Function
Signed halfword data transfer
Standard)
Extension 1) Unusable
Extension 2) Unusable
15
Code
0
0
1
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IE
C
V
Flag
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Mode
Src:Register indirect with post-increment %rb = %r0 to %r15
Dst:Register direct %rd = %r0 to %r15
CLK
Two cycles
Description
The halfword data in the specified memory location is transferred to the rd register after being sign-
extended to 32 bits. The rb register contains the memory address to be accessed. Following data
transfer, the address in the rb register is incremented by 2.
Caution
(1) The rb register must specify a halfword boundary address (least significant bit = 0). Specifying
an odd address causes an address misaligned exception.
(2) If the same register is specified for rd and rb, the incremented address after transferring data is
loaded to the rd register.
S1C33 FAMILY C33 PE CORE MANUAL
rd(15:0) ← H[rb], rd(31:16) ← H[rb](15), rb ← rb + 2
12 11
8
7
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0
1
0
0
1
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Z
N
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4
3
0
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r b
r d
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EPSON
7 DETAILS OF INSTRUCTIONS
0x29__
105

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