Ld.b [%Rb], %Rs - Epson S1C33 Series Core Manual

Cmos 32-bit single chip microcomputer
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ld.b [%rb], %rs

Function
Signed byte data transfer
Standard)
Extension 1) B[rb + imm13] ← rs(7:0)
Extension 2) B[rb + imm26] ← rs(7:0)
15
Code
0
0
1
|
|
IE
C
V
Flag
|
|
Mode
Src:Register direct %rs = %r0 to %r15
Dst:Register indirect %rb = %r0 to %r15
CLK
One cycle (two cycles when ext is used)
Description
(1) Standard
ld.b
The 8 low-order bits of the rs register are transferred to the specified memory location. The rb
register contains the memory address to be accessed.
(2) Extension 1
ext
ld.b
The e x t instruction changes the addressing mode to register indirect addressing with
displacement. As a result, the 8 low-order bits of the rs register are transferred to the address
indicated by the content of the rb register with the 13-bit immediate imm13 added. The content
of the rb register is not altered.
(3) Extension 2
ext
ext
ld.b
The addressing mode changes to register indirect addressing with displacement, so the 8 low-
order bits of the rs register are transferred to the address indicated by the content of the rb
register with the 26-bit immediate imm26 added. The content of the rb register is not altered.
S1C33 FAMILY C33 PE CORE MANUAL
B[rb] ← rs(7:0)
12 11
8
7
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1
0
1
0
0
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Z
N
|
|
[%rb],%rs
; memory address = rb
imm13
[%rb],%rs
; memory address = rb + imm13
imm13
; = imm26(25:13)
imm13
; = imm26(12:0)
[%rb],%rs
; memory address = rb + imm26
4
3
0
|
r b
r s
|
|
|
|
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EPSON
7 DETAILS OF INSTRUCTIONS
0x34__
97

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