5.3 Instructions Added to the C33 PE Core
Classification
Branch
jpr
jpr.d
System control
psrset
psrclr
Coprocessor control
ld.c
ld.c
do.c
ld.cf
Other
swaph
push
pop
pushs
pops
5.4 Instructions Removed
Classification
Arithmetic operation
div0s
div0u
div1
div2s
div3s
Other
mirror
mac
scan0
scan1
S1C33 FAMILY C33 PE CORE MANUAL
Table 5.3.1 Instructions Added to the C33 PE Core
Mnemonic
PC relative jump
%rb
Delayed branching possible
Set a specified bit in PSR
imm5
Clear a specified bit in PSR
imm5
Load data from coprocessor
%rd,imm4
Store data in coprocessor
imm4,%rs
Execute coprocessor
imm6
Load C, V, Z, and N flags from coprocessor
Bytewise swap on halfword boundary in word
%rd,%rs
Push single general-purpose register
%rs
Pop single general-purpose register
%rd
Push special registers %ss–ALR onto the stack
%ss
Pop data for special registers %sd–ALR off the stack
%sd
Table 5.4.1 Instructions Removed
Mnemonic
First step in signed integer division
%rs
First step in unsigned integer division
%rs
Execution of step division
%rs
Data correction for the result of signed integer division 1
%rs
Data correction for the result of signed integer division 2
Bitwise swap every byte in word
%rd,%rs
Multiply-accumulate operation 16 bits × 16 bits + 64 bits → 64 bits
%rs
Search for bits whose value = 0
%rd,%rs
Search for bits whose value = 1
%rd,%rs
EPSON
5 INSTRUCTION SET
Function
Function
21