Ld.w %Rd, [%Sp + Imm6] - Epson S1C33 Series Core Manual

Cmos 32-bit single chip microcomputer
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7 DETAILS OF INSTRUCTIONS

ld.w %rd, [%sp + imm6]

Function
Word data transfer
Standard)
Extension 1) rd ← W[sp + imm19]
Extension 2) rd ← W[sp + imm32]
15
Code
0
1
0
|
|
IE
C
V
Flag
|
|
Mode
Src:Register indirect with displacement
Dst:Register direct %rd = %r0 to %r15
CLK
Two cycles
Description
(1) Standard
ld.w
The word data in the specified memory location is transferred to the rd register. The content
of the current SP with 4 times the 6-bit immediate imm6 added as displacement comprises the
memory address to be accessed. The two least significant bits of the displacement are always 0.
(2) Extension 1
ext
ld.w
The ext instruction extends the displacement to a 19-bit quantity. As a result, the content of
the SP with the 19-bit immediate imm19 added comprises the memory address, the word data
in which is transferred to the rd register. Make sure the imm6 specified here resides on a word
boundary (two least significant bits = 0).
(3) Extension 2
ext
ext
ld.w
The two ext instructions extend the displacement to a 32-bit quantity. As a result, the content
of the SP with the 32-bit immediate imm32 added comprises the memory address, the word data
in which is transferred to the rd register. Make sure the imm6 specified here resides on a word
boundary (two least significant bits = 0).
122
rd ← W[sp + imm6 × 4]
12 11 10
9
|
|
1
0
0
imm6
|
|
|
|
|
Z
N
|
|
%rd,[%sp + imm6]
imm13
%rd,[%sp + imm6]
imm13
imm13
%rd,[%sp + imm6]
4
3
0
|
r d
|
|
|
|
|
; memory address = sp + imm6 × 4
; = imm19(18:6)
; memory address = sp + imm19,
; imm6 = imm19(5:0)
; = imm32(31:19)
; = imm32(18:6)
; memory address = sp + imm32,
; imm6 = imm32(5:0)
EPSON
0x50__
S1C33 FAMILY C33 PE CORE MANUAL

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