Swaph %Rd, %Rs - Epson S1C33 Series Core Manual

Cmos 32-bit single chip microcomputer
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7 DETAILS OF INSTRUCTIONS

swaph %rd, %rs

Function
Swap
Standard)
Extension 1) Unusable
Extension 2) Unusable
15
Code
1
0
0
|
|
IE
C
V
Flag
|
|
Mode
Src:Register direct %rs = %r0 to %r15
Dst:Register direct %rd = %r0 to %r15
CLK
One cycle
Description
(1) Standard
Converts the 32-bit data in a general-purpose register between big and little endians at halfword
boundaries.
rs register
rd register
(2) Delayed instruction
This instruction may be executed as a delayed instruction by writing it directly after a branch
instruction with the "d" bit.
Example
When r1 = 0x12345678
swaph
166
rd(31:24) ← rs(23:16), rd(23:16) ← rs(31:24), rd(15:8) ← rs(7:0), rd(7:0) ← rs(15:8)
12 11
8
7
|
|
1
1
0
1
0
|
|
|
|
|
Z
N
|
|
31
24 23
Byte 3
Byte 2
31
24 23
; 0x34127856 → r2
%r2,%r1
4
3
0
|
r s
r d
|
|
|
|
|
16 15
Byte 2
Byte 1
Byte 3
Byte 0
16 15
EPSON
0x9A__
8 7
Byte 0
Byte 1
8 7
S1C33 FAMILY C33 PE CORE MANUAL
0
0

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