Sub %Rd, Imm6 - Epson S1C33 Series Core Manual

Cmos 32-bit single chip microcomputer
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sub %rd, imm6

Function
Subtraction
Standard)
Extension 1) rd ← rd - imm19
Extension 2) rd ← rd - imm32
15
Code
0
1
1
|
|
IE
C
V
Flag
– ↔ ↔ ↔ ↔
|
|
Mode
Src:Immediate data (unsigned)
Dst:Register direct %rd = %r0 to %r15
CLK
One cycle
Description
(1) Standard
sub
The 6-bit immediate imm6 is subtracted from the rd register after being zero-extended.
(2) Extension 1
ext
sub
The 19-bit immediate imm19 is subtracted from the rd register after being zero-extended.
(3) Extension 2
ext
ext
sub
The 32-bit immediate imm32 is subtracted from the rd register.
(4) Delayed instruction
This instruction may be executed as a delayed instruction by writing it directly after a branch
instruction with the "d" bit. In this case, extension of the immediate by the ext instruction
cannot be performed.
Example
(1) sub
(2) ext
ext
sub
S1C33 FAMILY C33 PE CORE MANUAL
rd ← rd - imm6
12 11 10
9
|
|
0
0
1
imm6
|
|
|
|
|
Z
N
|
|
; rd ← rd - imm6
%rd,imm6
imm13
; = imm19(18:6)
; rd ← rd - imm19, imm6 = imm19(5:0)
%rd,imm6
imm13
; = imm32(31:19)
imm13
; = imm32(18:6)
; rd ← rd - imm32, imm6 = imm32(5:0)
%rd,imm6
%r0,0x3f
; r0 = r0 - 0x3f
0x1fff
0x1fff
%r1,0x3f
; r1 = r1 - 0xffffffff
4
3
0
|
r d
|
|
|
|
|
EPSON
7 DETAILS OF INSTRUCTIONS
0x64__
163

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