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CPU
Main Instruction Formats
The figure below shows the main instruction formats supported by the H8/300L CPU.
• Arithmetic or logic operation on immediate data and
register contents
• Register-register arithmetic or logic operation
• Data transfer instruction [@Rm↔ Rn]
• Data transfer instruction [@(d:16,Rm)↔ Rn]
• Branch instruction [@(d:8,PC)]
• Branch instruction [@aa:16]
• Bit manipulation instruction (with direct specification
of bit position)
<Notation>
OP:
Op-code
Rn,Rm:
General register
#IMM:
Immediate data
d:
Displacement
aa:
Absolute address
b'n:
Bit number
15
OP
15
OP
15
OP
15
OP
15
OP
15
15
OP
36
8
7
0
R
#IMM
8
7
0
Rm
Rn
8
7
0
Rm
Rn
8
7
0
Rm
Rn
d:16
8
7
0
d:8
8
7
0
OP
aa:16
8
7
0
b'n
Rn
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