Rom - Hitachi H8/300L Series Manual

Peripheral Functions

11. ROM

The H8/300L Series product lineup includes microcomputers with on-chip ROM capacities
from 16 kbytes to 60 kbytes. The H8/300L Series ROM is connected to the CPU over a 16-bit
data bus, and can be accessed in only 2 states in both byte and word access modes. Due to the
speed of this ROM, the H8/300L CPU has a minimum instruction execution time of 0.4 µs
when the operating frequency is 5 MHz.
Block Diagram
Note: This figure shows the H8/3724 32-kbyte ROM.
The lowest addresses in the H8/300L Series ROM area are used as the interrupt vector region.
The relationship between interrupts and the interrupt vector region differs for each product,
and is described in the individual product hardware manuals. The area from H'0000 to H'00FF,
which includes the interrupt vector area, can be accessed using an indirect addressing mode
based on an 8-bit address included in the H8/300L Series CPU instruction code. Application
programs can be coded compactly by storing commonly used branch addresses in this area.
Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
H'0000 H'0000
H'0002 H'0002
H'7DFE H'7DFE
Even addresses
H'0001
H'0003
H'7DFE
Odd addresses
116