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Hitachi H8/300L Series Manual page 92

Single-chip microcomputer
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Peripheral Functions
Watchdog Timer
Function: The watchdog timer is an 8-bit counter incremented by the input clock. It provides
a monitoring function that resets the IC internally when, due to system runaway or
other problem, the counter overflows before the counter value is rewritten.
Features: • The watchdog timer counter is incremented by an internal clock with a
frequency of ø/8192, and generates a reset signal (WRST) when the counter
overflows.
• The overflow period can be set to a value between 1 and 256 times 8192/ø.
Block Diagram
System
Prescaler S
clock ø
<Notation>
TCSRW:
Timer control/status register W
TCW:
Timer counter W
WRST:
Reset signal
TCSRW
TCW
92
Reset signal
WRST

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