Starting The Superclock-2 Module - Xilinx Virtex-7 FPGA VC7203 Characterization Kit IBERT Getting Started Manual

Chapter 1: VC7203 IBERT Getting Started Guide
5.
X-Ref Target - Figure 1-12
6.

Starting the SuperClock-2 Module

The IBERT demonstration designs use an integrated VIO core to control the clocks on the
SuperClock-2 module. The SuperClock-2 module features two clock-source components:
1) An always-on Si570 crystal oscillator and, 2) an Si5368 jitter-attenuating clock multiplier.
Outputs from either device can be used to drive the transceiver reference clocks.
16
Send Feedback
In the Select Hardware Target window, the xilinx_tcf cable appears under Type. The
JTAG chain contents of the selected cable appears under the Hardware Devices
window (Figure 1-12). Select xilinx_tcf and click Next.
Figure 1-12: Select Hardware Target
In the Set Hardware Target Properties window, leave the defaults and click Next. In the
Open Hardware Target Summary window, click Finish. The wizard closes and the
Vivado tool opens the hardware target.
www.xilinx.com VC7203 IBERT Getting Started Guide
UG847 (v4.0) November 6, 2013