Gtx Transceiver Clock Connections; Gtx Tx/Rx Loopback Connections - Xilinx Virtex-7 FPGA VC7203 Characterization Kit IBERT Getting Started Manual

Hide thumbs Also See for Virtex-7 FPGA VC7203 Characterization Kit IBERT:
Table of Contents

Advertisement

GTX Transceiver Clock Connections

See
reference clock inputs. Connect these cables to the SuperClock-2 module as follows:
Note:
the GTX reference clock. CLKOUT1_P and CLKOUT1_N are used here as an example.

GTX TX/RX Loopback Connections

See
receivers (RX0, RX1, RX2 and RX3) and the four transmitters (TX0, TX1, TX2 and TX3). Use
eight SMA female-to-female (F-F) adapters
receive cables as shown in
Note:
however, do not over tighten the SMAs.
X-Ref Target - Figure 1-6
VC7203 IBERT Getting Started Guide
UG847 (v4.0) November 6, 2013
Figure 1-2, page 9
to identify the P and N coax cables that are connected to the CLK1
CLK1_P coax cable → SMA connector J5 (CLKOUT1_P) on the SuperClock-2 module
CLK1_N coax cable → SMA connector J6 (CLKOUT1_N) on the SuperClock-2
module
Any one of the five differential outputs from the SuperClock-2 module can be used to source
Figure 1-2, page 9
to identify the P and N coax cables that are connected to the four
Figure 1-7
TX0_P → SMA F-F Adapter → RX0_P
TX0_N → SMA F-F Adapter → RX0_N
TX1_P → SMA F-F Adapter → RX1_P
TX1_N → SMA F-F Adapter → RX1_N
TX2_P → SMA F-F Adapter → RX2_P
TX2_N → SMA F-F Adapter → RX2_N
TX3_P → SMA F-F Adapter → RX3_P
TX3_N → SMA F-F Adapter → RX3_N
To ensure good connectivity, it is recommended that the adapters be secured with a wrench;
Figure 1-6: SMA F-F Adapter
www.xilinx.com
Running the GTX IBERT Demonstration
(Figure
1-6), to connect the transmit and
and detailed here:
11
Send Feedback

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the Virtex-7 FPGA VC7203 Characterization Kit IBERT and is the answer not in the manual?

Subscribe to Our Youtube Channel

Table of Contents