Table C-7: Mic-3716 Register For Channel Number And A/D Data - Advantech MIC-3716 Manual

ONE/FH
CNT0
AD16/12
Table C-7: MIC-3716 Register for channel number and
Read
Bit # 7
BASE + 1 CH3
BASE + 0 AD7
AD11 ~ AD0
0 Disable
1 Enable
Interrupt source bit
0 Interrupt when an A/D conversion occurs
1 Interrupt when the FIFO is half full.
Counter 0 clock source select bit
0 The clock source of Counter 0 comes from the
internal clock, 1 MHz
1 The clock source of Counter 0 comes from the
external clock, maximum up to 10 MH
Analog Input resolution.
0 16 bit
1 12 bit. And those two registers BASE+0 &
BASE+1 (Table C-7)
A/D data
Channel Number and A/D Data
6 5
CH2 CH1
AD6 AD5
Result of A/D Conversion
AD0 the least significant bit (LSB) of A/D
data
AD11 the most significant bit (MSB)
4 3
CH0 AD11 AD10
AD4 AD3 AD2
2 1 0
AD9 AD8
AD1 AD0
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