Table of Contents
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Preface
iv
=1
=
1706 I2>>
I
>
2
1706 T I2>>
T
0
0
T
T
S
Q
R
Q
n
Exclusive–OR gate: output is active, if only one
of the inputs is active
Coincidence gate: output is active, if both
are active simultaneously
Input signals of dynamic quantity
Formation of one output signal from a number
of analog inputs
Limit stage with parameter address and
designator
Timer (pick up delayed) with parameter address
and designator
Timer (dropout delayed)
Dynamic triggered pulse timer (monoflop)
Static memory (RS–flipflop) with setting input (S),
resetting input (R), output (Q) and inverted
output (Q)
inputs
7UM62 Manual
C53000-G1176-C149-3
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