Cb; Scw Summation; Quadrature Demodulation Circuit; Pencil Cw Tx/Rx Circuit - Toshiba Aplio SSA-770A Service Manual

Diagnostic ultrasound system
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No. 2D730-148E*O
4.1.4
CB
(1)
General description
The CB board consists of the SCW channel adding circuit (summation),
SCW/CW
quadrature
detection circuit, pencil CW transducer transmission/reception
circuit, clock
generation
circuit, bus interface circuit, and self-diagnosis
circuit.
(2)
Functions
(a)
SCW summation
This function applies a delay of less than one period of the carrier waveform to the
reception signals output from the preamplifier of the TR board and performs algebraic
summation.
(b)
Quadrature
demodulation
circuit
The band-pass filter (BPF) removes the higher harmonic elements.
The mixer
performs quadrature
demodulation
with the carrier frequency.
The BPF and high-pass filter (HPF) located behind the mixer removes clutter
elements.
The selectable gain AMP circuit adjusts the levels of the Doppler signals,
which differ depending
on the type of transducer.
The ADC converts the Doppler signals that have undergone
quadrature
demodulation
to digital signals. These digital signals are then sent to the BE board.
The phase and gain difference information
in the sin/cos circuit is sent to IDPROM
(5. Interface Section) and is corrected automatically
in the BE board.
If the correction is performed incorrectly, mirror artifacts increase.
(c)
Pencil CW TX/RX circuit
The pencil CW TX/RX circuit is connected to the pencil transducer via the TI board.
Bipolar transmission
is used. For reception, Pencil CW mode is switched to SCW
mode after the preamplifier.
If switching is performed
incorrectly, echoes from the pencil transducer cannot pass.
(d)
Clock generation
circuit (pluse generator/LO)
This circuit generates the clock which drives the pencil transmission
circuit in the
pencil CW TX/RX circuit, and also generates the reference clocks for the two mixers.
These clocks are derived from the TXPG ASIC.
If the TXPG ASIC is broken, images cannot be displayed in Pencil CW mode and
SCW mode.
(e)
Inter-face
The interface circuitry includes an address decoder EPLD, an ID EEPROM, a JTAG
controller PLD, clock drivers, and buffers.
4-17

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