Operation Of Clock Generator Supplying Clock To Peripheral Hardware - NEC 78K0S/KA1+ Preliminary User's Manual

8-bit single-chip microcontrollers
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5.6

Operation of Clock Generator Supplying Clock to Peripheral Hardware

The following two types of clocks are supplied to the peripheral hardware.
• Clock to peripheral hardware (f
• Low-speed Ring-OSC clock (f
(1) Clock to peripheral hardware
The clock to the peripheral hardware is supplied by dividing the system clock (f
by the pre-processor clock control register (PPCC).
Three types of frequencies are selectable: "f
peripheral hardware.
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(2) Low-speed Ring-OSC clock
The low-speed Ring-OSC oscillator of the clock oscillator for interval time generation is always started after
release of reset, and oscillates at 240 kHz (TYP.).
It can be specified by the option byte whether the low-speed Ring-OSC oscillator can or cannot be stopped by
software. If it is specified that the low-speed Ring-OSC oscillator can be stopped by software, oscillation can be
started or stopped by using the low-speed Ring-OSC mode register (LSRCM). If it is specified that it cannot be
stopped by software, the clock source of WDT is fixed to the low-speed Ring-OSC clock (fRL).
The low-speed Ring-OSC oscillator is independent of the CPU clock. If it is used as the source clock of WDT,
therefore, a hang-up can be detected even if the CPU clock is stopped. If the low-speed Ring-OSC oscillator is
used as a count clock source of 8-bit timer H1, 8-bit timer H1 can operate even in the standby status.
Table 5-4 shows the operation status of the low-speed Ring-OSC oscillator when it is selected as the source
clock of WDT and the count clock of 8-bit timer H1. Figure 5-16 shows the status transition of the low-speed
Ring-OSC oscillator.
Can be stopped by
software
Cannot be stopped
CHAPTER 5 CLOCK GENERATORS
)
XP
)
RL
Table 5-3. Clocks to Peripheral Hardware
PPCC1
PPCC0
0
0
f
X
0
1
f
/2
X
2
1
0
f
/2
X
1
1
Setting prohibited
Table 5-4. Operation Status of Low-Speed Ring-OSC Oscillator
Option Byte Setting
LSRSTOP = 1
LSRSTOP = 0
LSRSTOP = 1
LSRSTOP = 0
Preliminary User's Manual U16898EJ1V0UD
2
", "f
/2", and "f
/2
". Table 5-3 lists the clocks supplied to the
X
X
X
Selection of clock to peripheral hardware (f
CPU Status
WDT Status
Operation mode
Stopped
Operates
Standby
Stopped
Stopped
Operation mode
Operates
Standby
). The division ratio is selected
X
)
XP
TMH1 Status
Stopped
Operates
Stopped
Operates
77

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