Operation List - NEC 78K0S/KA1+ Preliminary User's Manual

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19.2 Operation List

Mnemonic
MOV
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XCH
Notes 1. Except r = A.
Remark
CHAPTER 19 INSTRUCTION SET OVERVIEW
Operand
r, #byte
saddr, #byte
sfr, #byte
Note 1
A, r
Note 1
r, A
A, saddr
saddr, A
A, sfr
sfr, A
A, !addr16
!addr16, A
PSW, #byte
A, PSW
PSW, A
A, [DE]
[DE], A
A, [HL]
[HL], A
A, [HL + byte]
[HL + byte], A
A, X
Note 2
A, r
A, saddr
A, sfr
A, [DE]
A, [HL]
A, [HL, byte]
2. Except r = A, X.
One instruction clock cycle is one CPU clock cycle (f
register (PCC).
Bytes Clocks
r ← byte
3 6
(saddr) ← byte
3 6
sfr ← byte
3 6
A ← r
2 4
r ← A
2 4
A ← (saddr)
2 4
(saddr) ← A
2 4
A ← sfr
2 4
sfr ← A
2 4
A ← (addr16)
3 8
(addr16) ← A
3 8
PSW ← byte
3 6
A ← PSW
2 4
PSW ← A
2 4
A ← (DE)
1 6
(DE) ← A
1 6
A ← (HL)
1 6
(HL) ← A
1 6
A ← (HL + byte)
2 6
(HL + byte) ← A
2 6
A ↔ X
1 4
A ↔ r
2 6
A ↔ (saddr)
2 6
A ↔ sfr
2 6
A ↔ (DE)
1 8
A ↔ (HL)
1 8
A ↔ (HL + byte)
2 8
Preliminary User's Manual U16898EJ1V0UD
Operation
) selected by the processor clock control
CPU
Flag
Z AC CY
× × ×
× × ×
273