Chapter 9 Watchdog Timer; Functions Of Watchdog Timer - NEC 78K0S/KA1+ Preliminary User's Manual

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9.1

Functions of Watchdog Timer

The watchdog timer is used to detect an inadvertent program loop. If a program loop is detected, an internal reset
signal is generated.
When a reset occurs due to the watchdog timer, bit 4 (WDTRF) of the reset control flag register (RESF) is set to 1.
For details of RESF, see CHAPTER 14 RESET FUNCTION.
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During Low-Speed Ring-OSC Clock Operation
f /2
RL
f /2
RL
f /2
RL
f /2
RL
f /2
RL
f /2
RL
f /2
RL
f /2
RL
Remarks 1. f
The operation mode of the watchdog timer (WDT) is switched according to the option byte setting of the on-chip
low-speed Ring-OSC oscillator as shown in Table 9-2.
140

CHAPTER 9 WATCHDOG TIMER

Table 9-1. Loop Detection Time of Watchdog Timer
11
(8.53 ms)
12
(17.07 ms)
13
(34.13 ms)
14
(68.27 ms)
15
(136.53 ms)
16
(273.07 ms)
17
(546.13 ms)
18
(1.09 s)
: Low-speed Ring-OSC clock oscillation frequency
RL
2. f : Oscillation frequency of clock to peripheral hardware
XP
3. Figures in parentheses apply to operation at f
Preliminary User's Manual U16898EJ1V0UD
Loop Detection Time
During Operation of Clock to Peripheral Hardware
µ
13
f /2 (819.2 s)
XP
14
f /2 (1.64 ms)
XP
15
f /2 (3.28 ms)
XP
16
f /2 (6.55 ms)
XP
17
f /2 (13.11 ms)
XP
18
f /2 (26.21 ms)
XP
19
f /2 (52.43 ms)
XP
20
f /2 (104.86 ms)
XP
= 240 kHz (TYP.), f
RL
= 10 MHz.
XP