NEC 78K0S/KA1+ Preliminary User's Manual page 241

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Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM
Ports (P2 to P4, P12, P13) (output latches)
Port mode registers (PM2 to PM4, PM12)
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Port mode control register (PMC2)
Pull-up resistor option registers (PU2, PU3, PU4, PU12)
Processor clock control register (PCC)
Preprocessor clock control register (PPCC)
Low-speed Ring-OSC mode register (LSRCM)
High-speed Ring-OSC mode register (HSRCM)
Oscillation stabilization time select register (OSTS)
16-bit timer 00
8-bit timer 80
8-bit timer H1
Watchdog timer
A/D converter
Notes 1.
2.
Table 14-1. Hardware Statuses After Reset Acknowledgment (1/2)
Note 1
Data memory
General-purpose registers
Timer counter 00 (TM00)
Capture/compare registers 000, 010 (CR000, CR010)
Mode control register 00 (TMC00)
Prescaler mode register 00 (PRM00)
Capture/compare control register 00 (CRC00)
Timer output control register 00 (TOC00)
Timer counter 80 (TM80)
Compare register (CR80)
Mode control register 80 (TMC80)
Compare registers (CMP01, CMP11)
Mode register 1 (TMHMD1)
Mode register (WDTM)
Enable register (WDTE)
Conversion result registers (ADCR, ADCRH)
Mode register (ADM)
Analog input channel specification register (ADS)
Only the contents of PC are undefined while reset is being input and while the oscillation stabilization time
elapses. The statuses of the other hardware units remain unchanged.
The status after reset is held in the standby mode.
CHAPTER 14 RESET FUNCTION
Hardware
Preliminary User's Manual U16898EJ1V0UD
Status After Reset
Contents of reset vector
table (0000H and
0001H) are set.
Undefined
02H
Note 2
Undefined
Note 2
Undefined
00H
FFH
00H
00H
02H
02H
00H
00H
Undefined
0000H
0000H
00H
00H
00H
00H
00H
Undefined
00H
00H
00H
67H
9AH
Undefined
00H
00H
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