NEC 78K0S/KA1+ Preliminary User's Manual page 144

www.DataSheet4U.com
Cautions 1. Set bits 7, 6, and 5 to 0, 1, and 1, respectively (when "low-speed Ring-OSC cannot be
Remarks 1. f
www.DataSheet4U.com
(2) Watchdog timer enable register (WDTE)
Writing ACH to WDTE clears the watchdog timer counter and starts counting again.
This register can be set by an 8-bit memory manipulation instruction.
Reset input sets this register to 9AH.
Address: FF49H
Symbol
WDTE
Cautions 1. If a value other than ACH is written to WDTE, an internal reset signal is generated.
144
CHAPTER 9 WATCHDOG TIMER
stopped" is selected by the option byte, other values are ignored).
2. After reset is released, WDTM can be written only once by an 8-bit memory
manipulation instruction. If writing is attempted a second time, an internal reset
signal is generated.
3. WDTM cannot be set by a 1-bit memory manipulation instruction.
: Low-speed Ring-OSC clock oscillation frequency
RL
2. f : Oscillation frequency of clock to peripheral hardware
XP
3. ×: Don't care
4. Figures in parentheses apply to operation at f
Figure 9-3. Format of Watchdog Timer Enable Register (WDTE)
After reset: 9AH R/W
7 6 5
2. If a 1-bit memory manipulation instruction is executed for WDTE, an internal reset
signal is generated.
3. The value read from WDTE is 9AH (this differs from the written value (ACH)).
Preliminary User's Manual U16898EJ1V0UD
= 240 kHz (TYP.), f
RL
4 3 2
= 10 MHz.
XP
1 0