NEC 78K0S/KA1+ Preliminary User's Manual page 141

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Watchdog timer clock
source
Operation after reset
Operation mode
selection
Features
Notes 1.
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Remarks 1. f
Table 9-2. Option Byte Setting and Watchdog Timer Operation Mode
Low-Speed Ring-OSC Cannot Be Stopped
Note 1
Fixed to f .
RL
Operation starts with the maximum interval (f
The interval can be changed only once.
The watchdog timer cannot be stopped.
As long as power is being supplied, low-speed Ring-OSC oscillation cannot be stopped (except in the
reset period).
2. The conditions under which clock supply to the watchdog timer is stopped differ depending on the
clock source of the watchdog timer.
<1> If the clock source is f
conditions.
• When f
is stopped
XP
• In HALT/STOP mode
• During oscillation stabilization time
<2> If the clock source is f
conditions.
• If the CPU clock is f
instruction
• In HALT/STOP mode
: Low-speed Ring-OSC clock oscillation frequency
RL
2. f : Oscillation frequency of clock to peripheral hardware
XP
CHAPTER 9 WATCHDOG TIMER
Option Byte Setting
18
/2 ). Operation starts with the maximum interval
RL
, clock supply to the watchdog timer is stopped under the following
XP
, clock supply to the watchdog timer is stopped under the following
RL
and if f is stopped by software before execution of the STOP
XP RL
Preliminary User's Manual U16898EJ1V0UD
Low-Speed Ring-OSC Can Be Stopped by Software
• Selectable by software (f
, f
XP RL
• When reset is released: f
RL
18
(f /2 ).
RL
The clock selection/interval can be changed only
once.
The watchdog timer can be stopped
or stopped)
Note 2
.
141