Table Of Contents - NEC 78K0S/KA1+ Preliminary User's Manual

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CHAPTER 1 OVERVIEW......................................................................................................................... 14
1.1
1.2
1.3
1.4
1.5
1.6
1.7
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CHAPTER 2 PIN FUNCTIONS............................................................................................................... 19
2.1
2.2
2.3
CHAPTER 3 CPU ARCHITECTURE...................................................................................................... 25
3.1
3.2
3.3
3.4
Features ...................................................................................................................................... 14
Application Fields ...................................................................................................................... 14
Ordering Information ................................................................................................................. 15
Pin Configuration (Top View) ................................................................................................... 15
78K0S/Kx1+ Product Lineup..................................................................................................... 16
Block Diagram............................................................................................................................ 17
Functional Outline ..................................................................................................................... 18
Pin Function List........................................................................................................................ 19
Pin Functions ............................................................................................................................. 21
2.2.1 P20 to P23 (Port 2)...................................................................................................................... 21
2.2.2 P30, P31, and P34 (Port 3) ......................................................................................................... 21
2.2.3 P40 to P45 (Port 4)...................................................................................................................... 22
2.2.4 P121 to P123 (Port 12)................................................................................................................ 22
2.2.5 P130 (Port 13) ............................................................................................................................. 22
2.2.6 RESET ........................................................................................................................................ 22
2.2.7 X1 and X2 ................................................................................................................................... 22
2.2.8 AV ........................................................................................................................................... 22
REF
2.2.9 V .............................................................................................................................................. 23
DD
2.2.10 V ............................................................................................................................................... 23
SS
Pin I/O Circuits and Connection of Unused Pins ................................................................... 23
Memory Space............................................................................................................................ 25
3.1.1 Internal program memory space.................................................................................................. 27
3.1.2 Internal data memory space ........................................................................................................ 27
3.1.3 Special function register (SFR) area ........................................................................................... 28
3.1.4 Data memory addressing ............................................................................................................ 28
Processor Registers .................................................................................................................. 30
3.2.1 Control registers .......................................................................................................................... 30
3.2.2 General-purpose registers........................................................................................................... 32
3.2.3 Special function registers (SFRs) ................................................................................................ 33
Instruction Address Addressing .............................................................................................. 36
3.3.1 Relative addressing..................................................................................................................... 36
3.3.2 Immediate addressing ................................................................................................................. 37
3.3.3 Table indirect addressing ............................................................................................................ 37
3.3.4 Register addressing .................................................................................................................... 38
Operand Address Addressing.................................................................................................. 39
3.4.1 Direct addressing ........................................................................................................................ 39
CONTENTS
Preliminary User's Manual U16898EJ1V0UD
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