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Cautions 1. In the case of an SBF reception error, return the mode to the SBF reception mode and hold
CHAPTER 11 SERIAL INTERFACE UART6
Figure 11-10. Format of Asynchronous Serial Interface Control Register 6 (ASICL6) (2/2)
SBL62
SBL61
1
0
1
1
1
1
0
0
0
0
0
1
0
1
1
0
DIR6
0
MSB
1
LSB
TXDLV6
0
Normal output of T
1
Inverted output of T
the status of the SBRF6 flag.
2. Before setting the SBRT6 bit, make sure that bit 7 (POWER6) and bit 5 (RXE6) of ASIM6 = 1.
3. The read value of the SBRT6 bit is always 0. SBRT6 is automatically cleared to 0 after SBF
reception has been correctly completed.
4. Before setting the SBTT6 bit to 1, make sure that bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 =
1.
5. The read value of the SBTT6 bit is always 0. SBTT6 is automatically cleared to 0 at the end of
SBF transmission.
6. Before rewriting the DIR6 and TXDLV6 bits, clear the TXE6 and RXE6 bits to 0.
SBL60
SBF transmission output width control
1
SBF is output with 13-bit length.
0
SBF is output with 14-bit length.
1
SBF is output with 15-bit length.
0
SBF is output with 16-bit length.
1
SBF is output with 17-bit length.
0
SBF is output with 18-bit length.
1
SBF is output with 19-bit length.
0
SBF is output with 20-bit length.
Specification of first bit
Enabling/disabling inverting T
D6
X
D6
X
Preliminary User's Manual U16898EJ1V0UD
D6 output
X
187