Description - Microsemi SmartFusion2 Demo Manual

In-System Programming Using UART Interface
2.2.2

Description

The ISP in SmartFusion2 devices is performed by the Cortex-M3 processor and the system controller.
The system controller manages the SmartFusion2 device programming and handles the system service
requests. The SmartFusion2 device allows the Cortex-M3 processor to directly provide a bitstream to the
system controller for programming. The Cortex-M3 processor initializes the system controller and
receives the programming bitstream from the Host PC through the UART interface. The received
bitstream is sent to the system controller to execute the ISP service in one of the following modes of
operation:
• Authenticate: System controller ISP service validates the integrity of the input data bitstream and
reports the status information to the Cortex-M3 processor.
• For security and reliability reasons, Microsemi recommends that the bitstream is authenticated
before the program is executed, using the Authenticate operation mode. The SmartFusion2
device application must commit only the bitstream for programming, after successful
authentication and the integrity of the bitstream is validated.
• Program: System controller ISP service programs the following depending on the input data
bitstream:
• eNVM
• FPGA fabric
• Both the eNVM and the FPGA fabric
• Verify: System controller ISP service verifies the contents of the SmartFusion2 device against the
input data bitstream and reports the status information to the Cortex-M3 processor.
The system controller ISP service utilizes the COMM_BLK interface to receive the entire programming
data bitstream as a continuous stream of bytes. See the
Subsystem User Guide
The Cortex-M3 processor in the SmartFusion2 device can execute an application image from embedded
SRAM (eSRAM), eNVM or DDR/SDR memories. See the
eNVM, eSRAM, and DDR/SDR SDRAM Memories Application Notes
techniques. In this demo design, the Cortex-M3 processor executes the ISP application image from
eSRAM while the eNVM programming taking place, that is during Program operation mode. In order to
execute the application image from eSRAM, the Cortex-M3 processor copies the ISP application image
(resides in eNVM data client) to the eSRAM and remaps the eSRAM to the Cortex-M3 processor code
region. For Verify and Authenticate operation modes, the application image can be executed from either
eNVM or eSRAM as the eNVM programming is not initiated. See the
Implementation Settings,
2.2.2.1 UART Host PC Loader
UART Host PC Loader (M2S_UARTHost_Loader.exe) is an executable program that transfers the
programming files (*.spi) from the Host PC to the SmartFusion2 Security Evaluation Kit board. The
M2S_UARTHost_Loader.exe
<download_folder>\sf2_isp_using_uart_interface_demo_df\host_tool_and_samples.
The syntax is:
M2S_UARTHost_Loader.exe <*.spi> <COM Port number> <Operation Mode>
Arguments:
• *.spi programming file.
• COM Port number.
• Operation Mode. See
For more information, see
for more information on communication block (COMM_BLK).
page 20.
file is executed from the command prompt. It is located at:
Table 2, page 5.
Running the Demo Design,
DG0454 Demo Guide Revision 8.0
UG0331: SmartFusion2 Microcontroller
AC390: SmartFusion2 SoC FPGA Remapping
for more information on remapping
Appendix: Hardware Project
page 8.
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