In-System Programming Using Uart Interface; Design Requirements; Demo Design; Table 1 Design Requirements - Microsemi SmartFusion2 Demo Manual

Soc fpga in-system programming using uart interface - libero soc v11.8
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In-System Programming Using UART Interface

2
In-System Programming Using UART
Interface
In-system programming (ISP) allows to reprogram the design iterations and field upgrades.
®
SmartFusion
interface. This document describes how to program the following using ISP through the UART interface:
Embedded nonvolatile memory (eNVM)
FPGA fabric
Both the eNVM and the FPGA fabric
For information on different programming modes supported by SmartFusion2 SoC FPGAs, see the
UG0451: IGLOO2 and SmartFusion2 Programming User
programming services, see the
Guide.
2.1

Design Requirements

The following table lists the hardware and software design requirements.
Table 1 •
Design Requirements
Design Requirements
Hardware
SmartFusion2 Security Evaluation Kit:
- 12 V adapter
- FlashPro4 programmer
- USB A to Mini-B cable
Host PC or Laptop
Software
®
Libero
System-on-Chip (SoC)
FlashPro Programming Software
Host PC Drivers
2.2

Demo Design

The demo design files are available for download at:
http://soc.microsemi.com/download/rsc/?f=m2s_dg0454_liberov11p8_df
The demo design files include:
Libero SoC software project
STAPL programming files
UART Host PC Loader application (M2S_UARTHost_Loader.exe)
Sample programming files
2 devices support ISP through the universal asynchronous receiver/transmitter (UART)
UG0450: SmartFusion2 SoC and IGLOO2 FPGA System Controller User
DG0454 Demo Guide Revision 8.0
Guide. For information on system controller
Description
Rev D or later
Windows 64-bit Operating System
v11.8
v11.8
USB to UART
2

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